From: msv Date: Thu, 23 Oct 2014 11:02:54 +0000 (+0400) Subject: 0025396: Crash occurs when using TBB allocator on an Intel architecture not supportin... X-Git-Tag: V6_8_0~64 X-Git-Url: http://git.dev.opencascade.org/gitweb/?p=occt.git;a=commitdiff_plain;h=75827e7628ca2d408a04c0f9d7a77f2c1813e026 0025396: Crash occurs when using TBB allocator on an Intel architecture not supporting SSE2 instructions During initialization of memory manager, check if SSE2 instructions are supported, when MMGT_OPT=2 is in effect. If not then use MMgrRaw instead of MMgrTBBalloc. It is to avoid runtime crash when running on a CPU that supports SSE but does not support SSE2 (some modifications of AMD Sempron). Fix broken compilation on MSVC for x64 platform Correct the last fix. --- diff --git a/src/Standard/Standard.cxx b/src/Standard/Standard.cxx index 4980f55171..4f79abb650 100644 --- a/src/Standard/Standard.cxx +++ b/src/Standard/Standard.cxx @@ -78,6 +78,38 @@ Standard_MMgrFactory::Standard_MMgrFactory() char* aVar; aVar = getenv ("MMGT_OPT"); Standard_Integer anAllocId = (aVar ? atoi (aVar): OCCT_MMGT_OPT_DEFAULT); + +#if defined(_WIN32) && !defined(_WIN64) + static const DWORD _SSE2_FEATURE_BIT(0x04000000); + if ( anAllocId == 2 ) + { + // CR25396: Check if SSE2 instructions are supported, if not then use MMgrRaw + // instead of MMgrTBBalloc. It is to avoid runtime crash when running on a + // CPU that supports SSE but does not support SSE2 (some modifications of + // AMD Sempron). + DWORD volatile dwFeature; + _asm + { + push eax + push ebx + push ecx + push edx + + // get the CPU feature bits + mov eax, 1 + cpuid + mov dwFeature, edx + + pop edx + pop ecx + pop ebx + pop eax + } + if ((dwFeature & _SSE2_FEATURE_BIT) == 0) + anAllocId = 0; + } +#endif + aVar = getenv ("MMGT_CLEAR"); Standard_Boolean toClear = (aVar ? (atoi (aVar) != 0) : Standard_True);