1 puts "================"
3 puts "================"
5 #################################################################
6 # Wrong name mapping of the instances of assembly into STEP file.
7 #################################################################
24 ttranslate hryad -10 0 10
26 ttranslate uryad 0 0 20
27 compound ryad hryad uryad stena
31 SetName SA 0:1:1:1 Wall
32 SetName SA 0:1:1:2 Block-Array
33 SetName SA 0:1:1:3 Block
34 SetName SA 0:1:1:4 Half-Brick
35 SetName SA 0:1:1:5 Brick
37 SetName SA 0:1:1:1:1 base-array
38 SetName SA 0:1:1:1:2 next-array
39 SetName SA 0:1:1:1:3 top-array
41 SetName SA 0:1:1:2:1 left-block
42 SetName SA 0:1:1:2:2 right-block
44 SetName SA 0:1:1:3:1 half-brick
45 SetName SA 0:1:1:3:2 brick
47 catch { WriteStep SA $imagedir/${test_image}.stp }
48 catch { ReadStep D $imagedir/${test_image}.stp }
50 puts "Info: Now compare two documents SA and D"
54 set NamesList1 {Wall Block-Array Block Half-Brick Brick}
55 set NamesList2 {base-array next-array top-array}
56 set NamesList3 {left-block right-block}
57 set NamesList4 {half-brick brick}
61 for {set i 1} {$i <= 5} {incr i} {
62 set name [ GetName D 0:1:1:$i ]
63 set ref_name [lindex $NamesList1 $i-1]
64 if { $name != $ref_name } {
71 for {set i 1} {$i <= 3} {incr i} {
72 set name [ GetName D 0:1:1:1:$i ]
73 set ref_name [lindex $NamesList2 $i-1]
74 if { $name != $ref_name } {
82 for {set i 1} {$i <= 2} {incr i} {
83 set name [ GetName D 0:1:1:2:$i ]
84 set ref_name [lindex $NamesList3 $i-1]
85 if { $name != $ref_name } {
93 for {set i 1} {$i <= 2} {incr i} {
94 set name [ GetName D 0:1:1:3:$i ]
95 set ref_name [lindex $NamesList4 $i-1]
96 if { $name != $ref_name } {
103 if { $status != 0 } {
104 puts "Faulty ${BugNumber}"
106 puts "OK ${BugNumber}"