Adding test cases for chl grid
[occt.git] / tests / bugs / modalg / bug714
CommitLineData
f1aa2b62 1#INTERFACE IGES
2puts "========"
3puts "OCC714"
4puts "========"
5puts ""
6####################################################
7## After command sew in DRAW on attached shape free wires are disappeared.
8####################################################
9
10restore [locate_data_file OCC714.brep] a
352ffd73 11checkshape a
f1aa2b62 12
13set nb_info1 [nbshapes a]
14regexp {VERTEX +: +([-0-9.+eE]+)} $nb_info1 full ve1
15regexp {EDGE +: +([-0-9.+eE]+)} $nb_info1 full ed1
16regexp {WIRE +: +([-0-9.+eE]+)} $nb_info1 full we1
17
18sewing result 0.1 a
19
20set nb_info2 [nbshapes a]
21regexp {VERTEX +: +([-0-9.+eE]+)} $nb_info2 full ve2
22regexp {EDGE +: +([-0-9.+eE]+)} $nb_info2 full ed2
23regexp {WIRE +: +([-0-9.+eE]+)} $nb_info2 full we2
24
25if { $ve1 != $ve2 || $ed1 != $ed2 || $we1 != $we2} {
26 puts [format "Faulty OCC714 : SEWING operation was made WRONGLY: vertexes before %s, edges before %s, wires before %s" $ve1 $ed1 $we1]
27 puts [format " vertexes after %s, edges after %s, wires after %s" $ve1 $ed1 $we1]
28} else {
29 puts "OK OCC714: SEWING operation was made PROPERLY"
30}
31
32set square 12917.1
33set 2dviewer 0
34